diff options
| author | Yatharth Kochar <yatharth.kochar@arm.com> | 2015-10-27 15:55:18 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2015-12-17 16:39:37 +0000 |
| commit | 84a5d6d660c7a194e9829e6c46d6eb80ecab84f5 (patch) | |
| tree | c4ea74bf58e8546c3c00f9c023dbb2b20c77e9cb /docs/firmware-design.md | |
| parent | 205dc896015c675076fd897b95c0f12fe35baf80 (diff) | |
FWU: Add documentation for Firmware Update feature
This patch adds design documentation for the Firmware Update (FWU)
feature in `firmware-update.md`. It provides an overview of FWU,
describes the BL1 SMC interface, and includes diagrams showing
an example FWU boot flow and the FWU state machine.
This patch also updates the existing TF documents where needed:
* `porting-guide.md`
* `user-guide.md`
* `firmware-design.md`
* `rt-svc-writers-guide.md`
* `trusted_board_boot.md`
Change-Id: Ie6de31544429b18f01327bd763175e218299a4ce
Co-Authored-By: Dan Handley <dan.handley@arm.com>
Diffstat (limited to 'docs/firmware-design.md')
| -rw-r--r-- | docs/firmware-design.md | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index d066fc32..42d90f36 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -189,9 +189,21 @@ the CCI slave interface corresponding to the cluster that includes the primary CPU. BL1 also initializes a UART (PL011 console), which enables access to the `printf` family of functions in BL1. +#### Firmware Update detection and execution + +After performing platform setup, BL1 common code calls +`bl1_plat_get_next_image_id()` to determine if [Firmware Update] is required or +to proceed with the normal boot process. If the platform code returns +`BL2_IMAGE_ID` then the normal boot sequence is executed as described in the +next section, else BL1 assumes that [Firmware Update] is required and execution +passes to the first image in the [Firmware Update] process. In either case, BL1 +retrieves a descriptor of the next image by calling `bl1_plat_get_image_desc()`. +The image descriptor contains an `entry_point_info_t` structure, which BL1 +uses to initialize the execution state of the next image. + #### BL2 image load and execution -BL1 execution continues as follows: +In the normal boot flow, BL1 execution continues as follows: 1. BL1 determines the amount of free trusted SRAM memory available by calculating the extent of its own data section, which also resides in @@ -1769,3 +1781,4 @@ _Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved._ [Porting Guide]: ./porting-guide.md [INTRG]: ./interrupt-framework-design.md [CPUBM]: ./cpu-specific-build-macros.md.md +[Firmware Update]: ./firmware-update.md |