diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2014-01-07 10:21:18 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2014-03-10 14:17:59 +0000 |
| commit | 1c297bf015226c182b66498d5a64b8b51c7624f5 (patch) | |
| tree | 599f1d5a6bec18bc5ce9f9964c0c4a0b6f0955eb /docs/porting-guide.md | |
| parent | 92a12866e6ab01c284f7aff01818c65851880bfd (diff) | |
Move architecture timer setup to platform-specific code
At present, bl1_arch_setup() and bl31_arch_setup() program the counter
frequency using a value from the memory mapped generic timer. The
generic timer however is not necessarily present on all ARM systems
(although it is architected to be present on all server systems).
This patch moves the timer setup to platform-specific code and updates
the relevant documentation. Also, CNTR.FCREQ is set as the specification
requires the bit corresponding to the counter's frequency to be set when
enabling. Since we intend to use the base frequency, set bit 8.
Fixes ARM-software/tf-issues#24
Change-Id: I32c52cf882253e01f49056f47c58c23e6f422652
Diffstat (limited to 'docs/porting-guide.md')
| -rw-r--r-- | docs/porting-guide.md | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/docs/porting-guide.md b/docs/porting-guide.md index 56467fb9..6bba3604 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -446,8 +446,9 @@ This function executes with the MMU and data caches enabled. It is responsible for performing any remaining platform-specific setup that can occur after the MMU and data cache have been enabled. -In the ARM FVP port, it zeros out the ZI section and enables the system level -implementation of the generic timer counter. +In the ARM FVP port, this function enables system-level implementation of the +generic timer counter. It also initializes counter frequency for CPU's generic +timers. This function is also responsible for initializing the storage abstraction layer which is used to load further bootloader images. @@ -771,6 +772,7 @@ BL3-1 runtime services and normal world software can function correctly. The ARM FVP port does the following: * Initializes the generic interrupt controller. * Configures the CLCD controller. +* Initializes counter frequency for CPU's generic timer * Grants access to the system counter timer module * Initializes the FVP power controller device * Detects the system topology. |