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authorVikram Kanigiri <vikram.kanigiri@arm.com>2014-12-23 01:00:22 +0000
committerVikram Kanigiri <vikram.kanigiri@arm.com>2015-03-16 18:37:47 +0000
commit23e47ede20b80e9f6cea5a7232ed1915ffbc9496 (patch)
tree8b253bd886b2b49ab382e0679b40ce9f4f407a29 /docs/user-guide.md
parenta7e98ad5145bb57fd18d199f915c76ef376cf227 (diff)
Common driver for ARM Cache Coherent Interconnects
Even though both CCI-400 and CCI-500 IPs have different configurations with respect to the number and types of supported interfaces, their register offsets and programming sequences are similar. This patch creates a common driver for enabling and disabling snoop transactions and DVMs with both the IPs. New platform ports which implement one of these IPs should use this common driver. Existing platform ports which implement CCI-400 should migrate to the common driver as the standalone CCI-400 will be deprecated in the future. Change-Id: I3ccd0eb7b062922d2e4a374ff8c21e79fa357556
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@@ -218,6 +218,10 @@ performed.
driver for implementing the platform GIC API. This API is used
by the interrupt management framework. Default is 2 (that is, version 2.0).
+* `ARM_CCI_PRODUCT_ID`: Choice of ARM CCI product used by the platform. This
+ is used to determine the number of valid slave interfaces available in the
+ ARM CCI driver. Default is 400 (that is, CCI-400).
+
* `IMF_READ_INTERRUPT_ID`: Boolean flag used by the interrupt management
framework to enable passing of the interrupt id to its handler. The id is
read using a platform GIC API. `INTR_ID_UNAVAILABLE` is passed instead if