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| author | danh-arm <dan.handley@arm.com> | 2016-04-08 14:31:58 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-04-08 14:31:58 +0100 |
| commit | 5d787dd97d2670c121c46d8365c84007a8aa5193 (patch) | |
| tree | 7bf3a8ed68486d29a83f8a59ff0da64b727b3d68 /docs | |
| parent | af984eefd7afece2faafb9211a26046d00b3d107 (diff) | |
| parent | 498256ed115055193a1e362fdf33a8ea29b9ae32 (diff) | |
Merge pull request #569 from Xilinx/zynqmp-v1
Support for Xilinx Zynq UltraScale+ MPSoC
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/plat/xilinx-zynqmp.md | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/docs/plat/xilinx-zynqmp.md b/docs/plat/xilinx-zynqmp.md new file mode 100644 index 00000000..997d9a9a --- /dev/null +++ b/docs/plat/xilinx-zynqmp.md @@ -0,0 +1,49 @@ +ARM Trusted Firmware for Xilinx Zynq UltraScale+ MPSoC +================================ + +ARM Trusted Firmware implements the EL3 firmware layer for Xilinx Zynq +UltraScale + MPSoC. +The platform only uses the runtime part of ATF as ZynqMP already has a +BootROM (BL1) and FSBL (BL2). + +BL31 is ATF. +BL32 is an optional Secure Payload. +BL33 is the non-secure world software (U-Boot, Linux etc). + +To build: +```bash +make ERROR_DEPRECATED=1 RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp bl31 +``` + +To build bl32 TSP you have to rebuild bl31 too: +```bash +make ERROR_DEPRECATED=1 RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd bl31 bl32 +``` + +# ZynqMP platform specific build options +* `ZYNQMP_ATF_LOCATION`: Specifies the location of the bl31 binary. Options: + - `tsram` : bl31 will be located in OCM (default) + - `tdram` : bl31 will be located in DRAM (address: 0x30000000) + +* `ZYNQMP_TSP_RAM_LOCATION`: Specifies the location of the bl32 binary and + secure payload dispatcher. Options: + - `tsram` : bl32/spd will be located in OCM (default) + - `tdram` : bl32/spd will be located in DRAM (address: 0x30000000) + +# Power Domain Tree +The following power domain tree represents the power domain model used by the +ATF for ZynqMP: +``` + +-+ + |0| + +-+ + +-------+---+---+-------+ + | | | | + | | | | + v v v v + +-+ +-+ +-+ +-+ + |0| |1| |2| |3| + +-+ +-+ +-+ +-+ +``` +The 4 leaf power domains represent the individual A53 cores, while resources +common to the cluster are grouped in the power domain on the top. |