diff options
author | Soby Mathew <soby.mathew@arm.com> | 2015-12-03 14:12:54 +0000 |
---|---|---|
committer | Soby Mathew <soby.mathew@arm.com> | 2015-12-04 12:02:12 +0000 |
commit | 03ffb6bdefca8f1aaf7ece10215f70b5ba51cae9 (patch) | |
tree | 2716dcfe68cd271ee2016ac83066e0972cc13d0d /drivers/arm/gic/v3/gicv3_helpers.c | |
parent | f3974ea5b17b0ec88091a8a8c59e56da0fe507f0 (diff) |
Rename GICv3 interrupt group macros
This patch renames the GICv3 interrupt group macros from
INT_TYPE_G0, INT_TYPE_G1S and INT_TYPE_G1NS to INTR_GROUP0,
INTR_GROUP1S and INTR_GROUP1NS respectively.
Change-Id: I40c66f589ce6234fa42205adcd91f7d6ad8f33d4
Diffstat (limited to 'drivers/arm/gic/v3/gicv3_helpers.c')
-rw-r--r-- | drivers/arm/gic/v3/gicv3_helpers.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/arm/gic/v3/gicv3_helpers.c b/drivers/arm/gic/v3/gicv3_helpers.c index 6e8251d5..2fb98cbb 100644 --- a/drivers/arm/gic/v3/gicv3_helpers.c +++ b/drivers/arm/gic/v3/gicv3_helpers.c @@ -312,7 +312,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base, unsigned int index, irq_num; uint64_t gic_affinity_val; - assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0)); + assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0)); /* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */ assert(num_ints ? (uintptr_t)sec_intr_list : 1); @@ -324,7 +324,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base, gicd_clr_igroupr(gicd_base, irq_num); /* Configure this interrupt as G0 or a G1S interrupt */ - if (int_grp == INT_TYPE_G1S) + if (int_grp == INTR_GROUP1S) gicd_set_igrpmodr(gicd_base, irq_num); else gicd_clr_igrpmodr(gicd_base, irq_num); @@ -386,7 +386,7 @@ void gicv3_secure_ppi_sgi_configure(uintptr_t gicr_base, { unsigned int index, irq_num; - assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0)); + assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0)); /* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */ assert(num_ints ? (uintptr_t)sec_intr_list : 1); @@ -398,7 +398,7 @@ void gicv3_secure_ppi_sgi_configure(uintptr_t gicr_base, gicr_clr_igroupr0(gicr_base, irq_num); /* Configure this interrupt as G0 or a G1S interrupt */ - if (int_grp == INT_TYPE_G1S) + if (int_grp == INTR_GROUP1S) gicr_set_igrpmodr0(gicr_base, irq_num); else gicr_clr_igrpmodr0(gicr_base, irq_num); |