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| author | danh-arm <dan.handley@arm.com> | 2016-03-16 11:02:54 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-03-16 11:02:54 +0000 |
| commit | 55a85659c0a35dba10c72a9c38b82b29f77a90ad (patch) | |
| tree | ea0d2f22acca0bb47a919577aee60767394de038 /fdts/fvp-foundation-gicv3-psci.dts | |
| parent | 63a6d09a084386f27a240602fd3be9a975ba65df (diff) | |
| parent | b1063d955bfed46de9e1bfdf58684f2da9837dcd (diff) | |
Merge pull request #552 from antonio-nino-diaz-arm/an/cache-dts
Add cache topology info to FVP DTBs
Diffstat (limited to 'fdts/fvp-foundation-gicv3-psci.dts')
| -rw-r--r-- | fdts/fvp-foundation-gicv3-psci.dts | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/fdts/fvp-foundation-gicv3-psci.dts b/fdts/fvp-foundation-gicv3-psci.dts index daad1fbc..45c699a6 100644 --- a/fdts/fvp-foundation-gicv3-psci.dts +++ b/fdts/fvp-foundation-gicv3-psci.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -108,6 +108,7 @@ reg = <0x0 0x0>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; }; CPU1:cpu@1 { @@ -116,6 +117,7 @@ reg = <0x0 0x1>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; }; CPU2:cpu@2 { @@ -124,6 +126,7 @@ reg = <0x0 0x2>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; }; CPU3:cpu@3 { @@ -132,6 +135,11 @@ reg = <0x0 0x3>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; }; }; |