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| author | danh-arm <dan.handley@arm.com> | 2015-12-09 10:41:08 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2015-12-09 10:41:08 +0000 |
| commit | 4ca473db0d60c7b3e67c7ebd5096e41f3dc45bf2 (patch) | |
| tree | 2465dcd7d4c6bee4c9f9ec7c3ef17c71221b3ca3 /include/bl32/tsp/tsp.h | |
| parent | 8d297cc94312c52b5104235fcdc4127ecef6d1af (diff) | |
| parent | 63b8440fcc3954817e20d3ba7a0be74435a284d2 (diff) | |
Merge pull request #456 from soby-mathew/sm/gicv3-tsp-plat-changes-v2
Modify TSP and ARM standard platforms for new GIC drivers v2
Diffstat (limited to 'include/bl32/tsp/tsp.h')
| -rw-r--r-- | include/bl32/tsp/tsp.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/bl32/tsp/tsp.h b/include/bl32/tsp/tsp.h index c6578b78..fd43fd3b 100644 --- a/include/bl32/tsp/tsp.h +++ b/include/bl32/tsp/tsp.h @@ -45,12 +45,12 @@ #define TSP_SYSTEM_RESET_DONE 0xf2000009 /* - * Function identifiers to handle FIQs through the synchronous handling model. - * If the TSP was previously interrupted then control has to be returned to - * the TSPD after handling the interrupt else execution can remain in the TSP. + * Function identifiers to handle S-El1 interrupt through the synchronous + * handling model. If the TSP was previously interrupted then control has to + * be returned to the TSPD after handling the interrupt else execution can + * remain in the TSP. */ -#define TSP_HANDLED_S_EL1_FIQ 0xf2000006 -#define TSP_EL3_FIQ 0xf2000007 +#define TSP_HANDLED_S_EL1_INTR 0xf2000006 /* SMC function ID that TSP uses to request service from secure monitor */ #define TSP_GET_ARGS 0xf2001000 @@ -63,7 +63,7 @@ #define TSP_SUB 0x2001 #define TSP_MUL 0x2002 #define TSP_DIV 0x2003 -#define TSP_HANDLE_FIQ_AND_RETURN 0x2004 +#define TSP_HANDLE_SEL1_INTR_AND_RETURN 0x2004 /* * Generate function IDs for TSP services to be used in SMC calls, by @@ -115,7 +115,7 @@ typedef struct tsp_vectors { tsp_vector_isn_t cpu_off_entry; tsp_vector_isn_t cpu_resume_entry; tsp_vector_isn_t cpu_suspend_entry; - tsp_vector_isn_t fiq_entry; + tsp_vector_isn_t sel1_intr_entry; tsp_vector_isn_t system_off_entry; tsp_vector_isn_t system_reset_entry; } tsp_vectors_t; |