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authorYatharth Kochar <yatharth.kochar@arm.com>2015-10-10 19:06:53 +0100
committerYatharth Kochar <yatharth.kochar@arm.com>2015-12-09 17:41:18 +0000
commit48bfb88eb6087bb3a293a13a0f702a0e40466b14 (patch)
treebdef7c2d9c48f232c83965d43fc01e7cca59e2c2 /include/common
parent7baff11fb51c2739d1c0fbac894c75b3c4b242e2 (diff)
FWU: Add Generic Firmware Update framework support in BL1
Firmware update(a.k.a FWU) feature is part of the TBB architecture. BL1 is responsible for carrying out the FWU process if platform specific code detects that it is needed. This patch adds support for FWU feature support in BL1 which is included by enabling `TRUSTED_BOARD_BOOT` compile time flag. This patch adds bl1_fwu.c which contains all the core operations of FWU, which are; SMC handler, image copy, authentication, execution and resumption. It also adds bl1.h introducing #defines for all BL1 SMCs. Following platform porting functions are introduced: int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size, unsigned int flags); This function can be used to add platform specific memory checks for the provided base/size for the given security state. The weak definition will invoke `assert()` and return -ENOMEM. __dead2 void bl1_plat_fwu_done(void *cookie, void *reserved); This function can be used to initiate platform specific procedure to mark completion of the FWU process. The weak definition waits forever calling `wfi()`. plat_bl1_common.c contains weak definitions for above functions. FWU process starts when platform detects it and return the image_id other than BL2_IMAGE_ID by using `bl1_plat_get_next_image_id()` in `bl1_main()`. NOTE: User MUST provide platform specific real definition for bl1_plat_mem_check() in order to use it for Firmware update. Change-Id: Ice189a0885d9722d9e1dd03f76cac1aceb0e25ed
Diffstat (limited to 'include/common')
-rw-r--r--include/common/bl_common.h7
-rw-r--r--include/common/tbbr/tbbr_img_def.h15
2 files changed, 15 insertions, 7 deletions
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index bedd496c..af83d784 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -45,13 +45,6 @@
#define TOP 0x1
#define BOTTOM !TOP
-/******************************************************************************
- * Corresponds to the function ID of the only SMC that the BL1 exception
- * handlers service. That's why the chosen value is the first function ID of
- * the ARM SMC64 range.
- *****************************************************************************/
-#define RUN_IMAGE 0xC0000000
-
/*******************************************************************************
* Constants that allow assembler code to access members of and the
* 'entry_point_info' structure at their correct offsets.
diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h
index c43c3954..fabe0b94 100644
--- a/include/common/tbbr/tbbr_img_def.h
+++ b/include/common/tbbr/tbbr_img_def.h
@@ -63,4 +63,19 @@
#define BL32_CERT_ID 14
#define BL33_CERT_ID 15
+/* Non-Trusted ROM Firmware NS_BL1U */
+#define NS_BL1U_IMAGE_ID 16
+
+/* Trusted FWU Certificate */
+#define FWU_CERT_ID 17
+
+/* Trusted FWU SCP Firmware SCP_BL2U */
+#define SCP_BL2U_IMAGE_ID 18
+
+/* Trusted FWU Boot Firmware BL2U */
+#define BL2U_IMAGE_ID 19
+
+/* Non-Trusted FWU Firmware NS_BL2U */
+#define NS_BL2U_IMAGE_ID 20
+
#endif /* __TBBR_IMG_DEF_H__ */