diff options
| author | danh-arm <dan.handley@arm.com> | 2016-03-09 08:45:23 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-03-09 08:45:23 +0000 |
| commit | b6fc25e027ad63bb06a59f1eddebad85c4716097 (patch) | |
| tree | d0275fac5d3bceb2a943e56cbc0c5899f54a7d0a /include/common | |
| parent | 5e3120d152444137a8289249f506e1971859e493 (diff) | |
| parent | 4e85e4fd11cab1b16b5ad1037fbdbd56a85d7d21 (diff) | |
Merge pull request #541 from antonio-nino-diaz-arm/an/secondary-cpu-init
Initialize secondary CPUs during cold boot
Diffstat (limited to 'include/common')
| -rw-r--r-- | include/common/el3_common_macros.S | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S index 6f7136f9..32df7d76 100644 --- a/include/common/el3_common_macros.S +++ b/include/common/el3_common_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -171,9 +171,19 @@ do_cold_boot: .endif /* _warm_boot_mailbox */ + /* --------------------------------------------------------------------- + * It is a cold boot. + * Perform any processor specific actions upon reset e.g. cache, TLB + * invalidations etc. + * --------------------------------------------------------------------- + */ + bl reset_handler + + el3_arch_init_common \_exception_vectors + .if \_secondary_cold_boot /* ------------------------------------------------------------- - * It is a cold boot. + * Check if this is a primary or secondary CPU cold boot. * The primary CPU will set up the platform while the * secondaries are placed in a platform-specific state until the * primary CPU performs the necessary actions to bring them out @@ -193,13 +203,10 @@ .endif /* _secondary_cold_boot */ /* --------------------------------------------------------------------- - * Perform any processor specific actions upon reset e.g. cache, TLB - * invalidations etc. + * Initialize memory now. Secondary CPU initialization won't get to this + * point. * --------------------------------------------------------------------- */ - bl reset_handler - - el3_arch_init_common \_exception_vectors .if \_init_memory bl platform_mem_init |