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| author | Juan Castillo <juan.castillo@arm.com> | 2015-11-26 14:52:15 +0000 |
|---|---|---|
| committer | Juan Castillo <juan.castillo@arm.com> | 2016-01-21 17:27:47 +0000 |
| commit | 9400b40ea4c71153a63c1f1cdaa416d45a325ec5 (patch) | |
| tree | 2246537b57b322e106a2e4cc618e0958c513dad6 /include/drivers | |
| parent | f9410b47c3ea36c9c231760a85efbbb7d6e575a7 (diff) | |
Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be
disabled before any of the control registers are programmed. The
PL011 driver included in TF does not disable the UART, so the
initialization in BL2 and BL31 is violating this requirement
(and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011
console driver to disable the UART before programming the
control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
Diffstat (limited to 'include/drivers')
| -rw-r--r-- | include/drivers/arm/pl011.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drivers/arm/pl011.h b/include/drivers/arm/pl011.h index d5ea890d..ce6cdcf5 100644 --- a/include/drivers/arm/pl011.h +++ b/include/drivers/arm/pl011.h @@ -71,6 +71,7 @@ #define PL011_UARTFR_TXFF_BIT 5 /* Transmit FIFO full bit in UARTFR register */ #define PL011_UARTFR_RXFE_BIT 4 /* Receive FIFO empty bit in UARTFR register */ +#define PL011_UARTFR_BUSY_BIT 3 /* UART busy bit in UARTFR register */ /* Control reg bits */ #if !PL011_GENERIC_UART |