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| author | danh-arm <dan.handley@arm.com> | 2014-06-16 12:41:48 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2014-06-16 12:41:48 +0100 |
| commit | 5c633bdff3f23c00fcfb91c26b709e1b66b84d21 (patch) | |
| tree | 898dd3f614d1ec8129048a95f1bb0100de5bfef7 /include/lib/aarch64/arch.h | |
| parent | 3934d1a6cca75237b97d21164c031701ea76a009 (diff) | |
| parent | 5c3272a717f357872973c78007b659dca0e5c673 (diff) | |
Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2
Make system register functions inline assembly v2
Diffstat (limited to 'include/lib/aarch64/arch.h')
| -rw-r--r-- | include/lib/aarch64/arch.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index d89b4fe9..0bfbd66c 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -65,6 +65,16 @@ #define FIRST_MPIDR 0 /******************************************************************************* + * Definitions for CPU system register interface to GICv3 + ******************************************************************************/ +#define ICC_SRE_EL1 S3_0_C12_C12_5 +#define ICC_SRE_EL2 S3_4_C12_C9_5 +#define ICC_SRE_EL3 S3_6_C12_C12_5 +#define ICC_CTLR_EL1 S3_0_C12_C12_4 +#define ICC_CTLR_EL3 S3_6_C12_C12_4 +#define ICC_PMR_EL1 S3_0_C4_C6_0 + +/******************************************************************************* * Implementation defined sysreg encodings ******************************************************************************/ #define CPUECTLR_EL1 S3_1_C15_C2_1 |