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| author | danh-arm <dan.handley@arm.com> | 2015-08-11 10:08:55 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2015-08-11 10:08:55 +0100 |
| commit | aaa0567c38ea6f08d68ce64210800b51a8872c13 (patch) | |
| tree | f4853ddf770eb91591306ab7a4a20f7e3ccf7cbd /include/lib/cpus | |
| parent | c905376f966dbdcfd1c9fb9adca87172e691897e (diff) | |
| parent | 7d116dccab2249a692181ba9521a52277e86591c (diff) | |
Merge pull request #356 from mtk09422/mt8173-support-v3
Mt8173 support v3
Diffstat (limited to 'include/lib/cpus')
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a53.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a53.h b/include/lib/cpus/aarch64/cortex_a53.h index 14821ab6..6e71f9ca 100644 --- a/include/lib/cpus/aarch64/cortex_a53.h +++ b/include/lib/cpus/aarch64/cortex_a53.h @@ -41,4 +41,19 @@ #define CPUECTLR_SMP_BIT (1 << 6) +/******************************************************************************* + * CPU Auxiliary Control register specific definitions. + ******************************************************************************/ +#define CPUACTLR_EL1 S3_1_C15_C2_0 /* Instruction def. */ + +#define CPUACTLR_DTAH (1 << 24) + +/******************************************************************************* + * L2 Auxiliary Control register specific definitions. + ******************************************************************************/ +#define L2ACTLR_EL1 S3_1_C15_C0_0 /* Instruction def. */ + +#define L2ACTLR_ENABLE_UNIQUECLEAN (1 << 14) +#define L2ACTLR_DISABLE_CLEAN_PUSH (1 << 3) + #endif /* __CORTEX_A53_H__ */ |