diff options
| author | danh-arm <dan.handley@arm.com> | 2015-12-10 11:54:42 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2015-12-10 11:54:42 +0000 |
| commit | 0c3a0b910005d0a94d4d67c88b2e79e439fc6b7e (patch) | |
| tree | 1ae9ed504c5346e681fb5b9407b242debf266cdd /include | |
| parent | 7ee2b8b3f8d610bf4f0e261ebaf3bd24afc1eea2 (diff) | |
| parent | 12f654b6a88f6f927fe34d00eece537b01f444e3 (diff) | |
Merge pull request #463 from jcastillo-arm/jc/tf-issues/216
De-feature PL011 UART driver to match generic UART spec
Diffstat (limited to 'include')
| -rw-r--r-- | include/drivers/arm/pl011.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/include/drivers/arm/pl011.h b/include/drivers/arm/pl011.h index 7c4df621..d5ea890d 100644 --- a/include/drivers/arm/pl011.h +++ b/include/drivers/arm/pl011.h @@ -36,17 +36,21 @@ #define UARTRSR 0x004 #define UARTECR 0x004 #define UARTFR 0x018 +#define UARTIMSC 0x038 +#define UARTRIS 0x03C +#define UARTICR 0x044 + +/* PL011 registers (out of the SBSA specification) */ +#if !PL011_GENERIC_UART #define UARTILPR 0x020 #define UARTIBRD 0x024 #define UARTFBRD 0x028 #define UARTLCR_H 0x02C #define UARTCR 0x030 #define UARTIFLS 0x034 -#define UARTIMSC 0x038 -#define UARTRIS 0x03C #define UARTMIS 0x040 -#define UARTICR 0x044 #define UARTDMACR 0x048 +#endif /* !PL011_GENERIC_UART */ /* Data status bits */ #define UART_DATA_ERROR_MASK 0x0F00 @@ -69,6 +73,7 @@ #define PL011_UARTFR_RXFE_BIT 4 /* Receive FIFO empty bit in UARTFR register */ /* Control reg bits */ +#if !PL011_GENERIC_UART #define PL011_UARTCR_CTSEN (1 << 15) /* CTS hardware flow control enable */ #define PL011_UARTCR_RTSEN (1 << 14) /* RTS hardware flow control enable */ #define PL011_UARTCR_RTS (1 << 11) /* Request to send */ @@ -95,4 +100,6 @@ #define PL011_UARTLCR_H_PEN (1 << 1) /* Parity Enable */ #define PL011_UARTLCR_H_BRK (1 << 0) /* Send break */ +#endif /* !PL011_GENERIC_UART */ + #endif /* __PL011_H__ */ |