diff options
author | Dan Handley <dan.handley@arm.com> | 2014-06-20 09:43:15 +0100 |
---|---|---|
committer | Dan Handley <dan.handley@arm.com> | 2014-07-09 16:36:39 +0100 |
commit | 1e8c5c4f20ef820c339992a89a4680f2ccddd69b (patch) | |
tree | f002ca49e24f23299cdb08ad3fb4f8020eab1b20 /include | |
parent | 6f3b195a18a151c08a4812497aaf4cee700d8b1b (diff) |
Refactor fvp gic code to be a generic driver
Refactor the FVP gic code in plat/fvp/fvp_gic.c to be a generic ARM
GIC driver in drivers/arm/gic/arm_gic.c. Provide the platform
specific inputs in the arm_gic_setup() function so that the driver
has no explicit dependency on platform code.
Provide weak implementations of the platform interrupt controller
API in a new file, plat/common/plat_gic.c. These simply call through
to the ARM GIC driver.
Move the only remaining FVP GIC function, fvp_gic_init() to
plat/fvp/aarch64/fvp_common.c and remove plat/fvp/fvp_gic.c
Fixes ARM-software/tf-issues#182
Change-Id: Iea82fe095fad62dd33ba9efbddd48c57717edd21
Diffstat (limited to 'include')
-rw-r--r-- | include/drivers/arm/arm_gic.h | 57 | ||||
-rw-r--r-- | include/drivers/arm/gic_v2.h | 4 |
2 files changed, 61 insertions, 0 deletions
diff --git a/include/drivers/arm/arm_gic.h b/include/drivers/arm/arm_gic.h new file mode 100644 index 00000000..9ab1a959 --- /dev/null +++ b/include/drivers/arm/arm_gic.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ARM_GIC_H__ +#define __ARM_GIC_H__ + +#include <stdint.h> + +/******************************************************************************* + * Function declarations + ******************************************************************************/ +void arm_gic_init(unsigned int gicc_base, + unsigned int gicd_base, + unsigned long gicr_base, + const unsigned int *irq_sec_ptr, + unsigned int num_irqs); +void arm_gic_setup(void); +void arm_gic_cpuif_deactivate(void); +void arm_gic_cpuif_setup(void); +void arm_gic_pcpu_distif_setup(void); + +uint32_t arm_gic_interrupt_type_to_line(uint32_t type, + uint32_t security_state); +uint32_t arm_gic_get_pending_interrupt_type(void); +uint32_t arm_gic_get_pending_interrupt_id(void); +uint32_t arm_gic_acknowledge_interrupt(void); +void arm_gic_end_of_interrupt(uint32_t id); +uint32_t arm_gic_get_interrupt_type(uint32_t id); + +#endif /* __GIC_H__ */ diff --git a/include/drivers/arm/gic_v2.h b/include/drivers/arm/gic_v2.h index 1859a8eb..4c6b0dcc 100644 --- a/include/drivers/arm/gic_v2.h +++ b/include/drivers/arm/gic_v2.h @@ -36,6 +36,10 @@ #define MAX_PPIS 14 #define MAX_SGIS 16 +#define MIN_SGI_ID 0 +#define MIN_PPI_ID 16 +#define MIN_SPI_ID 32 + #define GRP0 0 #define GRP1 1 #define GIC_PRI_MASK 0xff |