diff options
| author | danh-arm <dan.handley@arm.com> | 2016-03-31 09:39:45 +0100 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-03-31 09:39:45 +0100 |
| commit | aaa416a4620cfabb27d641c23ef27bd1ace9c107 (patch) | |
| tree | 50d8c94f397f1af668a286fd91d6a23b022d4ffd /include | |
| parent | 6b1ca8f35802fddc530e1a5f2be7b82ddbab6917 (diff) | |
| parent | 6b836cf98892ad50a8bafa3fdf4e1be894601fa4 (diff) | |
Merge pull request #554 from ljerry/tf_issue_368_ter
Enable asynchronous abort exceptions during boot
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/el3_common_macros.S | 11 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 5 | ||||
| -rw-r--r-- | include/lib/aarch64/arch_helpers.h | 9 |
3 files changed, 14 insertions, 11 deletions
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S index 0cd85c34..ba80d95d 100644 --- a/include/common/el3_common_macros.S +++ b/include/common/el3_common_macros.S @@ -70,8 +70,15 @@ isb /* --------------------------------------------------------------------- - * Enable the SError interrupt now that the exception vectors have been - * setup. + * Early set RES1 bits in SCR_EL3. Set EA bit as well to catch both + * External Aborts and SError Interrupts in EL3. + * --------------------------------------------------------------------- + */ + mov x0, #(SCR_RES1_BITS | SCR_EA_BIT) + msr scr_el3, x0 + /* --------------------------------------------------------------------- + * Enable External Aborts and SError Interrupts now that the exception + * vectors have been setup. * --------------------------------------------------------------------- */ msr daifclr, #DAIF_ABT_BIT diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a9b2dbb2..f9b8ed6a 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -186,6 +186,11 @@ #define HCR_IMO_BIT (1 << 4) #define HCR_FMO_BIT (1 << 3) +/* ISR definitions */ +#define ISR_A_SHIFT 8 +#define ISR_I_SHIFT 7 +#define ISR_F_SHIFT 6 + /* CNTHCTL_EL2 definitions */ #define EVNTEN_BIT (1 << 2) #define EL1PCEN_BIT (1 << 1) diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index d1ad31dc..6118c6eb 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -168,15 +168,6 @@ void disable_mmu_icache_el3(void); DEFINE_SYSREG_WRITE_CONST_FUNC(daifset) DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr) -#define enable_irq() write_daifclr(DAIF_IRQ_BIT) -#define enable_fiq() write_daifclr(DAIF_FIQ_BIT) -#define enable_serror() write_daifclr(DAIF_ABT_BIT) -#define enable_debug_exceptions() write_daifclr(DAIF_DBG_BIT) -#define disable_irq() write_daifset(DAIF_IRQ_BIT) -#define disable_fiq() write_daifset(DAIF_FIQ_BIT) -#define disable_serror() write_daifset(DAIF_ABT_BIT) -#define disable_debug_exceptions() write_daifset(DAIF_DBG_BIT) - DEFINE_SYSREG_READ_FUNC(par_el1) DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) |