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| author | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2015-09-10 14:12:36 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2015-09-14 22:09:40 +0100 |
| commit | e3616819a9802ae84e9ed23092e26968bc1f25ae (patch) | |
| tree | e9b9258472bc3d0f87862d062b0ed468eb3c1f09 /include | |
| parent | 54dc71e7ec9f2a069907e8c0c24b5c8f8cc5f66a (diff) | |
Tegra: Perform cache maintenance on video carveout memory
Currently, the non-overlapping video memory carveout region is cleared after
disabling the MMU at EL3. If at any exception level the carveout region is being
marked as cacheable, this zeroing of memory will not have an affect on the
cached lines. Hence, we first invalidate the dirty lines and update the memory
and invalidate again so that both caches and memory is zeroed out.
Change-Id: If3b2d139ab7227f6799c0911d59e079849dc86aa
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions