diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2014-11-18 10:14:14 +0000 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2015-01-13 14:28:08 +0000 |
| commit | 099973469b430fdbccc6ab82737c760aeccfbfce (patch) | |
| tree | cc19eb1c2a5e27de60c8fc03e3ddfb571494809e /lib/cpus | |
| parent | 23cf7d0fcc6ba5ff2f06f43e3dc19ca854310077 (diff) | |
Invalidate the dcache after initializing cpu-ops
This patch fixes a crash due to corruption of cpu_ops
data structure. During the secondary CPU boot, after the
cpu_ops has been initialized in the per cpu-data, the
dcache lines need to invalidated so that the update in
memory can be seen later on when the dcaches are turned ON.
Also, after initializing the psci per cpu data, the dcache
lines are flushed so that they are written back to memory
and dirty dcache lines are avoided.
Fixes ARM-Software/tf-issues#271
Change-Id: Ia90f55e9882690ead61226eea5a5a9146d35f313
Diffstat (limited to 'lib/cpus')
| -rw-r--r-- | lib/cpus/aarch64/cpu_helpers.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/lib/cpus/aarch64/cpu_helpers.S b/lib/cpus/aarch64/cpu_helpers.S index f053d44f..5680bce6 100644 --- a/lib/cpus/aarch64/cpu_helpers.S +++ b/lib/cpus/aarch64/cpu_helpers.S @@ -120,7 +120,19 @@ func init_cpu_ops cmp x0, #0 ASM_ASSERT(ne) #endif - str x0, [x6, #CPU_DATA_CPU_OPS_PTR] + str x0, [x6, #CPU_DATA_CPU_OPS_PTR]! + + /* + * Make sure that any pre-fetched cache copies are invalidated. + * Ensure that we are running with cache disable else we + * invalidate our own update. + */ +#if ASM_ASSERTION + mrs x1, sctlr_el3 + tst x1, #SCTLR_C_BIT + ASM_ASSERT(eq) +#endif + dc ivac, x6 mov x30, x10 1: ret |