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author | davidcunado-arm <david.cunado@arm.com> | 2016-09-01 09:43:32 +0100 |
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committer | GitHub <noreply@github.com> | 2016-09-01 09:43:32 +0100 |
commit | 99e89377ebdcf8b46ae5dcb5f940483760a8a03f (patch) | |
tree | 6b91319c2ac499b1a66b1b14bc36003255066cab /lib | |
parent | f6ace15f9fdaa78342e758ebc61699754a4d6be2 (diff) | |
parent | 9e3b4cbbade36bb38a4a96381f0aca1b48ccaa0c (diff) |
Merge pull request #695 from soby-mathew/sm/AArch32_fixes
Fixes for AArch32 port of TF
Diffstat (limited to 'lib')
-rw-r--r-- | lib/el3_runtime/aarch32/context_mgmt.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/el3_runtime/aarch32/context_mgmt.c b/lib/el3_runtime/aarch32/context_mgmt.c index 6915ded7..bc5f9c42 100644 --- a/lib/el3_runtime/aarch32/context_mgmt.c +++ b/lib/el3_runtime/aarch32/context_mgmt.c @@ -86,6 +86,8 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t /* Clear any residual register values from the context */ memset(ctx, 0, sizeof(*ctx)); + reg_ctx = get_regs_ctx(ctx); + /* * Base the context SCR on the current value, adjust for entry point * specific requirements @@ -121,8 +123,6 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t if (GET_M32(ep->spsr) == MODE32_hyp) scr |= SCR_HCE_BIT; - reg_ctx = get_regs_ctx(ctx); - write_ctx_reg(reg_ctx, CTX_SCR, scr); write_ctx_reg(reg_ctx, CTX_LR, ep->pc); write_ctx_reg(reg_ctx, CTX_SPSR, ep->spsr); |