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author | danh-arm <dan.handley@arm.com> | 2016-07-15 18:55:43 +0100 |
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committer | GitHub <noreply@github.com> | 2016-07-15 18:55:43 +0100 |
commit | aadb1350eed3c18aec6cd999519cef55d93678b3 (patch) | |
tree | d851cbd6afa9f9b14676cde93bbf4e49f0cfebf1 /plat/arm/common/aarch64/arm_common.c | |
parent | 9306f135922bc7811dfc1e24a755c38ce2e671cd (diff) | |
parent | 91fad6551ee3e5529f9b442cd4a084251cdebe1d (diff) |
Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn
Map read-only data as execute-never
Diffstat (limited to 'plat/arm/common/aarch64/arm_common.c')
-rw-r--r-- | plat/arm/common/aarch64/arm_common.c | 104 |
1 files changed, 57 insertions, 47 deletions
diff --git a/plat/arm/common/aarch64/arm_common.c b/plat/arm/common/aarch64/arm_common.c index c4cc80e6..7c0b93db 100644 --- a/plat/arm/common/aarch64/arm_common.c +++ b/plat/arm/common/aarch64/arm_common.c @@ -50,57 +50,67 @@ extern const mmap_region_t plat_arm_mmap[]; #pragma weak plat_get_syscnt_freq #endif -/******************************************************************************* - * Macro generating the code for the function setting up the pagetables as per - * the platform memory map & initialize the mmu, for the given exception level - ******************************************************************************/ +/* + * Set up the page tables for the generic and platform-specific memory regions. + * The extents of the generic memory regions are specified by the function + * arguments and consist of: + * - Trusted SRAM seen by the BL image; + * - Code section; + * - Read-only data section; + * - Coherent memory region, if applicable. + */ +void arm_setup_page_tables(unsigned long total_base, + unsigned long total_size, + unsigned long code_start, + unsigned long code_limit, + unsigned long rodata_start, + unsigned long rodata_limit #if USE_COHERENT_MEM -#define DEFINE_CONFIGURE_MMU_EL(_el) \ - void arm_configure_mmu_el##_el(unsigned long total_base, \ - unsigned long total_size, \ - unsigned long ro_start, \ - unsigned long ro_limit, \ - unsigned long coh_start, \ - unsigned long coh_limit) \ - { \ - mmap_add_region(total_base, total_base, \ - total_size, \ - MT_MEMORY | MT_RW | MT_SECURE); \ - mmap_add_region(ro_start, ro_start, \ - ro_limit - ro_start, \ - MT_MEMORY | MT_RO | MT_SECURE); \ - mmap_add_region(coh_start, coh_start, \ - coh_limit - coh_start, \ - MT_DEVICE | MT_RW | MT_SECURE); \ - mmap_add(plat_arm_get_mmap()); \ - init_xlat_tables(); \ - \ - enable_mmu_el##_el(0); \ - } -#else -#define DEFINE_CONFIGURE_MMU_EL(_el) \ - void arm_configure_mmu_el##_el(unsigned long total_base, \ - unsigned long total_size, \ - unsigned long ro_start, \ - unsigned long ro_limit) \ - { \ - mmap_add_region(total_base, total_base, \ - total_size, \ - MT_MEMORY | MT_RW | MT_SECURE); \ - mmap_add_region(ro_start, ro_start, \ - ro_limit - ro_start, \ - MT_MEMORY | MT_RO | MT_SECURE); \ - mmap_add(plat_arm_get_mmap()); \ - init_xlat_tables(); \ - \ - enable_mmu_el##_el(0); \ - } + , + unsigned long coh_start, + unsigned long coh_limit +#endif + ) +{ + /* + * Map the Trusted SRAM with appropriate memory attributes. + * Subsequent mappings will adjust the attributes for specific regions. + */ + VERBOSE("Trusted SRAM seen by this BL image: %p - %p\n", + (void *) total_base, (void *) (total_base + total_size)); + mmap_add_region(total_base, total_base, + total_size, + MT_MEMORY | MT_RW | MT_SECURE); + + /* Re-map the code section */ + VERBOSE("Code region: %p - %p\n", + (void *) code_start, (void *) code_limit); + mmap_add_region(code_start, code_start, + code_limit - code_start, + MT_CODE | MT_SECURE); + + /* Re-map the read-only data section */ + VERBOSE("Read-only data region: %p - %p\n", + (void *) rodata_start, (void *) rodata_limit); + mmap_add_region(rodata_start, rodata_start, + rodata_limit - rodata_start, + MT_RO_DATA | MT_SECURE); + +#if USE_COHERENT_MEM + /* Re-map the coherent memory region */ + VERBOSE("Coherent region: %p - %p\n", + (void *) coh_start, (void *) coh_limit); + mmap_add_region(coh_start, coh_start, + coh_limit - coh_start, + MT_DEVICE | MT_RW | MT_SECURE); #endif -/* Define EL1 and EL3 variants of the function initialising the MMU */ -DEFINE_CONFIGURE_MMU_EL(1) -DEFINE_CONFIGURE_MMU_EL(3) + /* Now (re-)map the platform-specific memory regions */ + mmap_add(plat_arm_get_mmap()); + /* Create the page tables to reflect the above mappings */ + init_xlat_tables(); +} uintptr_t plat_get_ns_image_entrypoint(void) { |