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| author | danh-arm <dan.handley@arm.com> | 2015-10-30 16:57:32 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2015-10-30 16:57:32 +0000 |
| commit | f4c012537d02be82b550b0d977a9b28b72c2637c (patch) | |
| tree | cfbaabb67ef5c1197db4d167163bc5d6b14791f4 /plat/arm/css/common/css_topology.c | |
| parent | c909c636c3ffe13360a342e3d69f2f5cb6bdae9c (diff) | |
| parent | 6971c6274432f74c73ca952617e38d191c94794d (diff) | |
Merge pull request #418 from soby-mathew/sm/sys_suspend
Support SYSTEM SUSPEND on Juno
Diffstat (limited to 'plat/arm/css/common/css_topology.c')
| -rw-r--r-- | plat/arm/css/common/css_topology.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/plat/arm/css/common/css_topology.c b/plat/arm/css/common/css_topology.c index 381e786b..03f81e61 100644 --- a/plat/arm/css/common/css_topology.c +++ b/plat/arm/css/common/css_topology.c @@ -31,26 +31,28 @@ #include <plat_arm.h> /* - * On ARM platforms, by default the cluster power level is treated as the + * On ARM CSS platforms, by default, the system power level is treated as the * highest. The first entry in the power domain descriptor specifies the - * number of cluster power domains i.e. 2. + * number of system power domains i.e. 1. */ -#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_CLUSTER_COUNT +#define CSS_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT /* - * The CSS power domain tree descriptor. The cluster power domains are - * arranged so that when the PSCI generic code creates the power domain tree, - * the indices of the CPU power domain nodes it allocates match the linear - * indices returned by plat_core_pos_by_mpidr() i.e. - * CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher indices for - * CLUSTER0 CPUs. + * The CSS power domain tree descriptor for dual cluster CSS platforms. + * The cluster power domains are arranged so that when the PSCI generic + * code creates the power domain tree, the indices of the CPU power + * domain nodes it allocates match the linear indices returned by + * plat_core_pos_by_mpidr() i.e. CLUSTER1 CPUs are allocated indices + * from 0 to 3 and the higher indices for CLUSTER0 CPUs. */ const unsigned char arm_power_domain_tree_desc[] = { /* No of root nodes */ CSS_PWR_DOMAINS_AT_MAX_PWR_LVL, - /* No of children for the first node */ + /* No of children for the root node */ + ARM_CLUSTER_COUNT, + /* No of children for the first cluster node */ PLAT_ARM_CLUSTER1_CORE_COUNT, - /* No of children for the second node */ + /* No of children for the second cluster node */ PLAT_ARM_CLUSTER0_CORE_COUNT }; |