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authordanh-arm <dan.handley@arm.com>2015-01-22 11:05:48 +0000
committerdanh-arm <dan.handley@arm.com>2015-01-22 11:05:48 +0000
commiteadd7a1b1e1dc270bed8df3197ea6fe9f1286849 (patch)
tree376a47144a8349f7ce3cdf21a1a12694e7f6bba6 /services/std_svc/psci/psci_common.c
parent1c73ffbd4cf8f62de529ad381d83fb79b76042de (diff)
parentab8707e6875a9fe447ff04fad9053d7d719f89e6 (diff)
Merge pull request #240 from danh-arm/sm/rem_coh_mem
Remove coherent memory v2
Diffstat (limited to 'services/std_svc/psci/psci_common.c')
-rw-r--r--services/std_svc/psci/psci_common.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
index 155f842e..0a1cdf9e 100644
--- a/services/std_svc/psci/psci_common.c
+++ b/services/std_svc/psci/psci_common.c
@@ -51,7 +51,10 @@ const spd_pm_ops_t *psci_spd_pm;
* corresponds to an affinity instance e.g. cluster, cpu within an mpidr
******************************************************************************/
aff_map_node_t psci_aff_map[PSCI_NUM_AFFS]
-__attribute__ ((section("tzfw_coherent_mem")));
+#if USE_COHERENT_MEM
+__attribute__ ((section("tzfw_coherent_mem")))
+#endif
+;
/*******************************************************************************
* Pointer to functions exported by the platform to complete power mgmt. ops
@@ -246,7 +249,8 @@ void psci_acquire_afflvl_locks(int start_afflvl,
for (level = start_afflvl; level <= end_afflvl; level++) {
if (mpidr_nodes[level] == NULL)
continue;
- bakery_lock_get(&mpidr_nodes[level]->lock);
+
+ psci_lock_get(mpidr_nodes[level]);
}
}
@@ -264,7 +268,8 @@ void psci_release_afflvl_locks(int start_afflvl,
for (level = end_afflvl; level >= start_afflvl; level--) {
if (mpidr_nodes[level] == NULL)
continue;
- bakery_lock_release(&mpidr_nodes[level]->lock);
+
+ psci_lock_release(mpidr_nodes[level]);
}
}
@@ -350,6 +355,10 @@ int psci_save_ns_entry(uint64_t mpidr,
******************************************************************************/
unsigned short psci_get_state(aff_map_node_t *node)
{
+#if !USE_COHERENT_MEM
+ flush_dcache_range((uint64_t) node, sizeof(*node));
+#endif
+
assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL);
/* A cpu node just contains the state which can be directly returned */
@@ -407,6 +416,10 @@ void psci_set_state(aff_map_node_t *node, unsigned short state)
node->state &= ~(PSCI_STATE_MASK << PSCI_STATE_SHIFT);
node->state |= (state & PSCI_STATE_MASK) << PSCI_STATE_SHIFT;
}
+
+#if !USE_COHERENT_MEM
+ flush_dcache_range((uint64_t) node, sizeof(*node));
+#endif
}
/*******************************************************************************