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-rw-r--r--drivers/arm/gic/v3/gicv3_private.h2
-rw-r--r--include/drivers/arm/gicv3.h6
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/arm/gic/v3/gicv3_private.h b/drivers/arm/gic/v3/gicv3_private.h
index 5e2409fc..9aa83382 100644
--- a/drivers/arm/gic/v3/gicv3_private.h
+++ b/drivers/arm/gic/v3/gicv3_private.h
@@ -141,6 +141,7 @@ static inline unsigned int gicd_read_pidr2(uintptr_t base)
static inline unsigned long long gicd_read_irouter(uintptr_t base, unsigned int id)
{
+ assert(id >= MIN_SPI_ID);
return mmio_read_64(base + GICD_IROUTER + (id << 3));
}
@@ -148,6 +149,7 @@ static inline void gicd_write_irouter(uintptr_t base,
unsigned int id,
unsigned long long affinity)
{
+ assert(id >= MIN_SPI_ID);
mmio_write_64(base + GICD_IROUTER + (id << 3), affinity);
}
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index e915c072..b7ad7785 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -55,7 +55,11 @@
#define GICD_SETSPI_SR 0x50
#define GICD_CLRSPI_SR 0x50
#define GICD_IGRPMODR 0xd00
-#define GICD_IROUTER 0x6100
+/*
+ * GICD_IROUTER<n> register is at 0x6000 + 8n, where n is the interrupt id and
+ * n >= 32, making the effective offset as 0x6100.
+ */
+#define GICD_IROUTER 0x6000
#define GICD_PIDR2_GICV3 0xffe8
#define IGRPMODR_SHIFT 5