diff options
Diffstat (limited to 'drivers/marvell/pci_ep.h')
| -rw-r--r-- | drivers/marvell/pci_ep.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/drivers/marvell/pci_ep.h b/drivers/marvell/pci_ep.h new file mode 100644 index 00000000..55882026 --- /dev/null +++ b/drivers/marvell/pci_ep.h @@ -0,0 +1,59 @@ +/* +* *************************************************************************** +* Copyright (C) 2016 Marvell International Ltd. +* *************************************************************************** +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* Redistributions of source code must retain the above copyright notice, this +* list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* Neither the name of Marvell nor the names of its contributors may be used +* to endorse or promote products derived from this software without specific +* prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +*************************************************************************** +*/ + +#ifndef _PCIE_EP_H_ +#define _PCIE_EP_H_ + +#define PCIE_MAX_BARS 6 +#define PCIE_MAX_LANES 16 + +struct pci_hw_cfg { + uint8_t delay_cfg; + uint8_t master_en; + uint8_t lane_width; + uint8_t lane_ids[PCIE_MAX_LANES]; + uint8_t clk_src; + uint8_t clk_out; + uint8_t is_end_point; + uintptr_t mac_base; + uintptr_t comphy_base; + uintptr_t hpipe_base; + uintptr_t dfx_base; +}; + +void dw_pcie_ep_init(uintptr_t dw_base, uint8_t delay_cfg, uint8_t master_en); +int comphy_pcie_power_up(uint32_t lane, struct pci_hw_cfg *hw); + +#endif /* _PCIE_EP_H_ */ + |