diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/bl31/cpu_data.h | 23 | ||||
| -rw-r--r-- | include/common/asm_macros.S | 33 | ||||
| -rw-r--r-- | include/common/assert_macros.S | 46 | ||||
| -rw-r--r-- | include/common/debug.h | 13 | ||||
| -rw-r--r-- | include/drivers/arm/cci400.h | 3 | ||||
| -rw-r--r-- | include/drivers/arm/pl011.h | 68 | ||||
| -rw-r--r-- | include/drivers/console.h | 3 | ||||
| -rw-r--r-- | include/plat/common/platform.h | 2 |
8 files changed, 109 insertions, 82 deletions
diff --git a/include/bl31/cpu_data.h b/include/bl31/cpu_data.h index 5f45f144..ef0b68cf 100644 --- a/include/bl31/cpu_data.h +++ b/include/bl31/cpu_data.h @@ -32,9 +32,14 @@ #define __CPU_DATA_H__ /* Offsets for the cpu_data structure */ -#define CPU_DATA_CRASH_STACK_OFFSET 0x10 +#define CPU_DATA_CRASH_BUF_OFFSET 0x10 +#if CRASH_REPORTING +#define CPU_DATA_LOG2SIZE 7 +#else #define CPU_DATA_LOG2SIZE 6 - +#endif +/* need enough space in crash buffer to save 8 registers */ +#define CPU_DATA_CRASH_BUF_SIZE 64 #ifndef __ASSEMBLY__ #include <arch_helpers.h> @@ -61,9 +66,21 @@ typedef struct cpu_data { void *cpu_context[2]; - uint64_t crash_stack; +#if CRASH_REPORTING + uint64_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3]; +#endif } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t; +#if CRASH_REPORTING +/* verify assembler offsets match data structures */ +CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof + (cpu_data_t, crash_buf), + assert_cpu_data_crash_stack_offset_mismatch); +#endif + +CASSERT((1 << CPU_DATA_LOG2SIZE) == sizeof(cpu_data_t), + assert_cpu_data_log2size_mismatch); + struct cpu_data *_cpu_data_by_index(uint32_t cpu_index); struct cpu_data *_cpu_data_by_mpidr(uint64_t mpidr); diff --git a/include/common/asm_macros.S b/include/common/asm_macros.S index 2bccf581..238fa82a 100644 --- a/include/common/asm_macros.S +++ b/include/common/asm_macros.S @@ -162,3 +162,36 @@ wait_for_entrypoint: .macro get_up_stack _name, _size ldr x0, =(\_name + \_size) .endm + + /* + * Helper macro to generate the best mov/movk combinations according + * the value to be moved. The 16 bits from '_shift' are tested and + * if not zero, they are moved into '_reg' without affecting + * other bits. + */ + .macro _mov_imm16 _reg, _val, _shift + .if (\_val >> \_shift) & 0xffff + .if (\_val & (1 << \_shift - 1)) + movk \_reg, (\_val >> \_shift) & 0xffff, LSL \_shift + .else + mov \_reg, \_val & (0xffff << \_shift) + .endif + .endif + .endm + + /* + * Helper macro to load arbitrary values into 32 or 64-bit registers + * which generates the best mov/movk combinations. Many base addresses + * are 64KB aligned the macro will eliminate updating bits 15:0 in + * that case + */ + .macro mov_imm _reg, _val + .if (\_val) == 0 + mov \_reg, #0 + .else + _mov_imm16 \_reg, (\_val), 0 + _mov_imm16 \_reg, (\_val), 16 + _mov_imm16 \_reg, (\_val), 32 + _mov_imm16 \_reg, (\_val), 48 + .endif + .endm diff --git a/include/common/assert_macros.S b/include/common/assert_macros.S new file mode 100644 index 00000000..45d699bd --- /dev/null +++ b/include/common/assert_macros.S @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + /* + * Assembler macro to enable asm_assert. Use this macro wherever + * assert is required in assembly. + */ +#define ASM_ASSERT(_cc) \ +.ifndef .L_assert_filename ;\ + .pushsection .rodata.str1.1, "aS" ;\ + .L_assert_filename: ;\ + .string __FILE__ ;\ + .popsection ;\ +.endif ;\ + b._cc 1f ;\ + adr x0, .L_assert_filename ;\ + mov x1, __LINE__ ;\ + b asm_assert ;\ +1: diff --git a/include/common/debug.h b/include/common/debug.h index c70109fd..3f5655ba 100644 --- a/include/common/debug.h +++ b/include/common/debug.h @@ -52,22 +52,9 @@ #define ERROR(...) tf_printf("ERROR: " __VA_ARGS__) - -/* For the moment this Panic function is very basic, Report an error and - * spin. This can be expanded in the future to provide more information. - */ -#if DEBUG -void __dead2 do_panic(const char *file, int line); -#define panic() do_panic(__FILE__, __LINE__) - -#else void __dead2 do_panic(void); #define panic() do_panic() -#endif - -void print_string_value(char *s, unsigned long *mem); void tf_printf(const char *fmt, ...); - #endif /* __DEBUG_H__ */ diff --git a/include/drivers/arm/cci400.h b/include/drivers/arm/cci400.h index 7222391f..6246e480 100644 --- a/include/drivers/arm/cci400.h +++ b/include/drivers/arm/cci400.h @@ -65,8 +65,11 @@ /* Status register bit definitions */ #define CHANGE_PENDING_BIT (1 << 0) +#ifndef __ASSEMBLY__ + /* Function declarations */ void cci_enable_coherency(unsigned long mpidr); void cci_disable_coherency(unsigned long mpidr); +#endif /* __ASSEMBLY__ */ #endif /* __CCI_400_H__ */ diff --git a/include/drivers/arm/pl011.h b/include/drivers/arm/pl011.h index 281330e4..7c4df621 100644 --- a/include/drivers/arm/pl011.h +++ b/include/drivers/arm/pl011.h @@ -31,9 +31,6 @@ #ifndef __PL011_H__ #define __PL011_H__ -#include <mmio.h> - - /* PL011 Registers */ #define UARTDR 0x000 #define UARTRSR 0x004 @@ -68,6 +65,9 @@ #define PL011_UARTFR_DSR (1 << 1) /* Data set ready */ #define PL011_UARTFR_CTS (1 << 0) /* Clear to send */ +#define PL011_UARTFR_TXFF_BIT 5 /* Transmit FIFO full bit in UARTFR register */ +#define PL011_UARTFR_RXFE_BIT 4 /* Receive FIFO empty bit in UARTFR register */ + /* Control reg bits */ #define PL011_UARTCR_CTSEN (1 << 15) /* CTS hardware flow control enable */ #define PL011_UARTCR_RTSEN (1 << 14) /* RTS hardware flow control enable */ @@ -78,14 +78,6 @@ #define PL011_UARTCR_LBE (1 << 7) /* Loopback enable */ #define PL011_UARTCR_UARTEN (1 << 0) /* UART Enable */ -#if !defined(PL011_BAUDRATE) -#define PL011_BAUDRATE 115200 -#endif - -#if !defined(PL011_CLK_IN_HZ) -#define PL011_CLK_IN_HZ 24000000 -#endif - #if !defined(PL011_LINE_CONTROL) /* FIFO Enabled / No Parity / 8 Data bit / One Stop Bit */ #define PL011_LINE_CONTROL (PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8) @@ -103,58 +95,4 @@ #define PL011_UARTLCR_H_PEN (1 << 1) /* Parity Enable */ #define PL011_UARTLCR_H_BRK (1 << 0) /* Send break */ -/******************************************************************************* - * Pl011 CPU interface accessors for writing registers - ******************************************************************************/ - -static inline void pl011_write_ibrd(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTIBRD, val); -} - -static inline void pl011_write_fbrd(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTFBRD, val); -} - -static inline void pl011_write_lcr_h(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTLCR_H, val); -} - -static inline void pl011_write_ecr(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTECR, val); -} - -static inline void pl011_write_cr(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTCR, val); -} - -static inline void pl011_write_dr(unsigned long base, unsigned int val) -{ - mmio_write_32(base + UARTDR, val); -} - -/******************************************************************************* - * Pl011 CPU interface accessors for reading registers - ******************************************************************************/ - -static inline unsigned int pl011_read_fr(unsigned long base) -{ - return mmio_read_32(base + UARTFR); -} - -static inline unsigned int pl011_read_dr(unsigned long base) -{ - return mmio_read_32(base + UARTDR); -} - -/******************************************************************************* - * Function prototypes - ******************************************************************************/ - -void pl011_setbaudrate(unsigned long base_addr, unsigned int baudrate); - #endif /* __PL011_H__ */ diff --git a/include/drivers/console.h b/include/drivers/console.h index e2859092..f144ab99 100644 --- a/include/drivers/console.h +++ b/include/drivers/console.h @@ -31,7 +31,8 @@ #ifndef __CONSOLE_H__ #define __CONSOLE_H__ -void console_init(unsigned long base_addr); +int console_init(unsigned long base_addr, + unsigned int uart_clk, unsigned int baud_rate); int console_putc(int c); int console_getc(void); diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index 4b73a097..ab93123c 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -72,6 +72,8 @@ uint32_t plat_interrupt_type_to_line(uint32_t type, unsigned int platform_get_core_pos(unsigned long mpidr); unsigned long platform_get_stack(unsigned long mpidr); void plat_report_exception(unsigned long); +void plat_crash_console_init(unsigned long base_addr); +int plat_crash_console_putc(int c); /******************************************************************************* * Mandatory BL1 functions |