diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a57.S | 27 | ||||
| -rw-r--r-- | lib/cpus/cpu-errata.mk | 48 |
2 files changed, 75 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S index 8b788566..eed1bbb9 100644 --- a/lib/cpus/aarch64/cortex_a57.S +++ b/lib/cpus/aarch64/cortex_a57.S @@ -29,6 +29,7 @@ */ #include <arch.h> #include <asm_macros.S> +#include <assert_macros.S> #include <cortex_a57.h> #include <cpu_macros.S> #include <plat_macros.S> @@ -81,6 +82,32 @@ func cortex_a57_disable_ext_debug ret func cortex_a57_reset_func +#if ERRATA_A57_806969 || ERRATA_A57_813420 + /* --------------------------------------------- + * Ensure that the following errata is only + * applied on r0p0 parts. + * --------------------------------------------- + */ +#if ASM_ASSERTION + mrs x0, midr_el1 + ubfx x1, x0, #MIDR_VAR_SHIFT, #4 + ubfx x2, x0, #MIDR_REV_SHIFT, #4 + orr x0, x1, x2 + cmp x0, #0 + ASM_ASSERT(eq) +#endif + mov x1, xzr +#if ERRATA_A57_806969 + orr x1, x1, #CPUACTLR_NO_ALLOC_WBWA +#endif +#if ERRATA_A57_813420 + orr x1, x1, #CPUACTLR_DCC_AS_DCCI +#endif + mrs x0, CPUACTLR_EL1 + orr x0, x0, x1 + msr CPUACTLR_EL1, x0 +#endif + /* --------------------------------------------- * As a bare minimum enable the SMP bit. * --------------------------------------------- diff --git a/lib/cpus/cpu-errata.mk b/lib/cpus/cpu-errata.mk new file mode 100644 index 00000000..79f0156d --- /dev/null +++ b/lib/cpus/cpu-errata.mk @@ -0,0 +1,48 @@ +# +# Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. +# +# Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# Neither the name of ARM nor the names of its contributors may be used +# to endorse or promote products derived from this software without specific +# prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# CPU Errata Build flags. These should be enabled by the +# platform if the errata needs to be applied. + +# Flag to apply errata 806969 during reset. This errata applies only to +# revision r0p0 of the Cortex A57 cpu. +ERRATA_A57_806969 ?=0 + +# Flag to apply errata 813420 during reset. This errata applies only to +# revision r0p0 of the Cortex A57 cpu. +ERRATA_A57_813420 ?=0 + +# Process ERRATA_A57_806969 flag +$(eval $(call assert_boolean,ERRATA_A57_806969)) +$(eval $(call add_define,ERRATA_A57_806969)) + +# Process ERRATA_A57_813420 flag +$(eval $(call assert_boolean,ERRATA_A57_813420)) +$(eval $(call add_define,ERRATA_A57_813420)) |