driver: don't ignore NPOT GPU capability

This enables any kind of wrapping for NPOT textures on GC880/GC2000+
GPUs with the NON_POWER_OF_TWO feature bit set.

3 files changed, 15 insertions, 11 deletions

diff --git a/native/driver/etna_internal.h b/native/driver/etna_internal.h
index 922813b..643914f 100644
--- a/native/driver/etna_internal.h
+++ b/native/driver/etna_internal.h
@@ -46,7 +46,15 @@
 struct etna_pipe_specs
 {
     /* supports SUPERTILE (64x64) tiling? */
-    bool can_supertile;
+    unsigned can_supertile:1;
+    /* needs z=(z+w)/2, for older GCxxx */
+    unsigned vs_need_z_div:1;
+    /* supports trigonometric instructions */
+    unsigned has_sin_cos_sqrt:1;
+    /* can use VS_RANGE, PS_RANGE registers*/
+    unsigned has_shader_range_registers:1;
+    /* can use any kind of wrapping mode on npot textures */
+    unsigned npot_tex_any_wrap;
     /* number of bits per TS tile */
     unsigned bits_per_tile;
     /* clear value for TS (dependent on bits_per_tile) */
@@ -57,8 +65,6 @@ struct etna_pipe_specs
     unsigned fragment_sampler_count;
     /* number of vertex sampler units */
     unsigned vertex_sampler_count;
-    /* needs z=(z+w)/2, for older GCxxx */
-    bool vs_need_z_div;
     /* size of vertex shader output buffer */
     unsigned vertex_output_buffer_size;
     /* size of a cached vertex (?) */
@@ -67,10 +73,6 @@ struct etna_pipe_specs
     unsigned shader_core_count;
     /* number of vertex streams */
     unsigned stream_count;
-    /* supports trigonometric instructions */
-    bool has_sin_cos_sqrt;
-    /* can use VS_RANGE, PS_RANGE registers*/
-    bool has_shader_range_registers;
     /* vertex shader memory address*/
     uint32_t vs_offset;
     /* pixel shader memory address*/
diff --git a/native/driver/etna_screen.c b/native/driver/etna_screen.c
index d62b111..bfe2c27 100644
--- a/native/driver/etna_screen.c
+++ b/native/driver/etna_screen.c
@@ -529,6 +529,7 @@ etna_screen_create(struct viv_conn *dev)
     screen->specs.stream_count = dev->chip.stream_count;
     screen->specs.has_sin_cos_sqrt = VIV_FEATURE(dev, chipMinorFeatures0, HAS_SQRT_TRIG);
     screen->specs.has_shader_range_registers = dev->chip.chip_model >= 0x1000 || dev->chip.chip_model == 0x880;
+    screen->specs.npot_tex_any_wrap = VIV_FEATURE(dev, chipMinorFeatures1, NON_POWER_OF_TWO);
     if (dev->chip.instruction_count > 256) /* unified instruction memory? */
     {
         screen->specs.vs_offset = 0xC000;
diff --git a/native/driver/etna_texture.c b/native/driver/etna_texture.c
index 3b4d135..58ac8ff 100644
--- a/native/driver/etna_texture.c
+++ b/native/driver/etna_texture.c
@@ -100,7 +100,7 @@ static struct pipe_sampler_view *etna_pipe_create_sampler_view(struct pipe_conte
                                                  struct pipe_resource *texture,
                                                  const struct pipe_sampler_view *templat)
 {
-    //struct etna_pipe_context *priv = etna_pipe_context(pipe);
+    struct etna_pipe_context *priv = etna_pipe_context(pipe);
     struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
     sv->base = *templat;
     sv->base.context = pipe;
@@ -133,7 +133,6 @@ static struct pipe_sampler_view *etna_pipe_create_sampler_view(struct pipe_conte
             VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0));
 
     /* Set up levels-of-detail */
-    /* XXX in principle we only have to define lods sv->first_level .. sv->last_level */
     for(int lod=0; lod<=res->base.last_level; ++lod)
     {
         cs->TE_SAMPLER_LOD_ADDR[lod] = res->levels[lod].address;
@@ -141,8 +140,10 @@ static struct pipe_sampler_view *etna_pipe_create_sampler_view(struct pipe_conte
     cs->min_lod = sv->base.u.tex.first_level << 5;
     cs->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
 
-    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is supported */
-    if(!util_is_power_of_two(res->base.width0) || !util_is_power_of_two(res->base.height0))
+    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is supported when the
+     * appropriate capability is not set. */
+    if(!priv->specs.npot_tex_any_wrap &&
+        (!util_is_power_of_two(res->base.width0) || !util_is_power_of_two(res->base.height0)))
     {
         cs->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
                                         VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);