diff options
| author | Christian Gmeiner <christian.gmeiner@gmail.com> | 2014-01-29 19:33:44 +0000 |
|---|---|---|
| committer | Christian Gmeiner <christian.gmeiner@gmail.com> | 2014-02-08 09:24:30 +0000 |
| commit | b93d8f202e436a68010267a5529936fbbffb0db2 (patch) | |
| tree | a65f91c591745fcc52664e79260674888700b342 /src | |
| parent | e248c02727d658843d7ea2c8c420b2589e7f1fed (diff) | |
rs: pipe addresses for second pipe depnds on STRIDE_MULTI
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/etnaviv/etna_rs.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/etnaviv/etna_rs.c b/src/etnaviv/etna_rs.c index a686df7..f535e5e 100644 --- a/src/etnaviv/etna_rs.c +++ b/src/etnaviv/etna_rs.c @@ -68,13 +68,11 @@ void etna_compile_rs_state(struct etna_ctx *restrict ctx, struct compiled_rs_sta ((rs->flip)?VIVS_RS_CONFIG_FLIP:0)); SET_STATE(RS_SOURCE_ADDR, rs->source_addr); SET_STATE(RS_PIPE_SOURCE_ADDR[0], rs->source_addr); - SET_STATE(RS_PIPE_SOURCE_ADDR[1], rs->source_addr); /* TODO */ SET_STATE(RS_SOURCE_STRIDE, (rs->source_stride << source_stride_shift) | ((rs->source_tiling&2)?VIVS_RS_SOURCE_STRIDE_TILING:0) | ((rs->source_multi)?VIVS_RS_SOURCE_STRIDE_MULTI:0)); SET_STATE(RS_DEST_ADDR, rs->dest_addr); SET_STATE(RS_PIPE_DEST_ADDR[0], rs->dest_addr); - SET_STATE(RS_PIPE_DEST_ADDR[1], rs->dest_addr); /* TODO */ SET_STATE(RS_DEST_STRIDE, (rs->dest_stride << dest_stride_shift) | ((rs->dest_tiling&2)?VIVS_RS_DEST_STRIDE_TILING:0) | ((rs->dest_multi)?VIVS_RS_DEST_STRIDE_MULTI:0)); @@ -84,6 +82,14 @@ void etna_compile_rs_state(struct etna_ctx *restrict ctx, struct compiled_rs_sta } else if (ctx->conn->chip.pixel_pipes == 2) { + if (rs->source_multi) + { + SET_STATE(RS_PIPE_SOURCE_ADDR[1], rs->source_addr); /* TODO */ + } + if (rs->dest_multi) + { + SET_STATE(RS_PIPE_DEST_ADDR[1], rs->dest_addr); /* TODO */ + } SET_STATE(RS_WINDOW_SIZE, VIVS_RS_WINDOW_SIZE_WIDTH(rs->width) | VIVS_RS_WINDOW_SIZE_HEIGHT(rs->height / 2)); } SET_STATE(RS_PIPE_OFFSET[0], VIVS_RS_PIPE_OFFSET_X(0) | VIVS_RS_PIPE_OFFSET_Y(0)); |