diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-02-14 05:09:54 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-02-22 11:22:03 -0800 |
| commit | 141f66ebbfa17cc7e2075f06c50107da978c965b (patch) | |
| tree | 9b312a3a25d1bf8442ff877cc6492611b8d7c91f | |
| parent | a7a4c19c36de1e4b99b06e4060ccc8ab837725bc (diff) | |
drm/msm/a5xx: fix highest bank bit for a530
A530 has highest bank bit equal to 15 (like A540). Fix values written to
REG_A5XX_RB_MODE_CNTL and REG_A5XX_TPL1_MODE_CNTL registers.
Fixes: 1d832ab30ce6 ("drm/msm/a5xx: Add support for Adreno 508, 509, 512 GPUs")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/522639/
Link: https://lore.kernel.org/r/20230214020956.164473-3-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 8b2df12d8681..047c5e8c87ff 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -806,7 +806,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) gpu_write(gpu, REG_A5XX_RBBM_AHB_CNTL2, 0x0000003F); /* Set the highest bank bit */ - if (adreno_is_a540(adreno_gpu)) + if (adreno_is_a540(adreno_gpu) || adreno_is_a530(adreno_gpu)) regbit = 2; else regbit = 1; |