diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2025-05-09 17:23:29 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-05-11 17:31:04 +0200 |
| commit | 34b2f7b883fed54fae357f513d545b5d5fb9f31f (patch) | |
| tree | bf0bccb3d05f358cf124f036d881c50a5064efb1 | |
| parent | ceb6ef1ea9002669afc0e1ef258e530d3c05d91a (diff) | |
arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588
As described, the analogix-dp controller on rk3588 only supports 2 clocks
and the edp0 node handles that correctly.
The edp1 node on the other hand seems to have a dangling 3rd clock called
spdif, that probably only exists in the vendor-tree.
As that is not handled at all, remove it for now so that we adhere to the
binding.
Fixes: a481bb0b1ad9 ("arm64: dts: rockchip: Add eDP1 dt node for rk3588")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250509152329.2004073-1-heiko@sntech.de
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi index 9d81d3b9444e..90414486e466 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi @@ -255,8 +255,8 @@ edp1: edp@fded0000 { compatible = "rockchip,rk3588-edp"; reg = <0x0 0xfded0000 0x0 0x1000>; - clocks = <&cru CLK_EDP1_24M>, <&cru PCLK_EDP1>, <&cru CLK_EDP1_200M>; - clock-names = "dp", "pclk", "spdif"; + clocks = <&cru CLK_EDP1_24M>, <&cru PCLK_EDP1>; + clock-names = "dp", "pclk"; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0>; phys = <&hdptxphy1>; phy-names = "dp"; |