diff options
| author | Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | 2025-07-17 14:57:58 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2025-07-19 17:36:40 +0200 |
| commit | 63149542dcf4468ed15469035740a937cf9ff88a (patch) | |
| tree | bce5d5050a4d75d673e39df6358415872031c9c2 | |
| parent | cc43eea3e1ef99ea4a5057e7b6bfcd9ed8e2a1d0 (diff) | |
pinctrl: ma35: use new GPIO line value setter callbacks
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20250717125758.53141-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | drivers/pinctrl/nuvoton/pinctrl-ma35.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index 06ae1fe8b8c5..0562d2476b35 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -361,7 +361,7 @@ static int ma35_gpio_core_get(struct gpio_chip *gc, unsigned int gpio) return !!(readl(reg_pin) & BIT(gpio)); } -static void ma35_gpio_core_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int ma35_gpio_core_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct ma35_pin_bank *bank = gpiochip_get_data(gc); void __iomem *reg_dout = bank->reg_base + MA35_GP_REG_DOUT; @@ -373,6 +373,8 @@ static void ma35_gpio_core_set(struct gpio_chip *gc, unsigned int gpio, int val) regval = readl(reg_dout) & ~BIT(gpio); writel(regval, reg_dout); + + return 0; } static int ma35_gpio_core_to_request(struct gpio_chip *gc, unsigned int gpio) @@ -524,7 +526,7 @@ static int ma35_gpiolib_register(struct platform_device *pdev, struct ma35_pinct bank->chip.direction_input = ma35_gpio_core_direction_in; bank->chip.direction_output = ma35_gpio_core_direction_out; bank->chip.get = ma35_gpio_core_get; - bank->chip.set = ma35_gpio_core_set; + bank->chip.set_rv = ma35_gpio_core_set; bank->chip.base = -1; bank->chip.ngpio = bank->nr_pins; bank->chip.can_sleep = false; |