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authorTomer Maimon <tmaimon77@gmail.com>2020-09-29 16:18:04 +0300
committerJoel Stanley <joel@jms.id.au>2020-11-17 12:41:01 +1030
commit7a28a9957ce7b4ed5cc30560034f54039cd56ed8 (patch)
tree91000878707a7ce11bbf9f6ca12d43357fd7de28
parent3e50523fe6f4b0ade2e8e0a1428e23b7503fb85c (diff)
ARM: dts: nuvoton: Modify timer register size
Modify NPCM7xx device tree timer register size from 0x50 to 0x1C to control only the timer registers and not other hw modules. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-3-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 16a28c5c4131..72e364054e72 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -120,7 +120,7 @@
timer0: timer@8000 {
compatible = "nuvoton,npcm750-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x8000 0x50>;
+ reg = <0x8000 0x1C>;
clocks = <&clk NPCM7XX_CLK_TIMER>;
};