diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-10-16 13:00:32 -0400 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-10-17 13:07:58 -0400 |
| commit | c535fe66f4a5df69c57faca1fc04a6c1b50240b9 (patch) | |
| tree | e650cf365a8cff08c9e961a376dc3c4ef94b0840 | |
| parent | 4e0434d4788be2cbb44ce1918ac492c1fd6c195b (diff) | |
dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml index cdfcf29dffee..0f796f1f0104 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml @@ -49,8 +49,10 @@ patternProperties: oneOf: - $ref: "#/$defs/qcom-sdx65-tlmm-state" - patternProperties: - ".*": + "-pins$": $ref: "#/$defs/qcom-sdx65-tlmm-state" + additionalProperties: false + '$defs': qcom-sdx65-tlmm-state: type: object @@ -175,13 +177,13 @@ examples: }; uart-w-subnodes-state { - rx { + rx-pins { pins = "gpio4"; function = "blsp_uart1"; bias-pull-up; }; - tx { + tx-pins { pins = "gpio5"; function = "blsp_uart1"; bias-disable; |