diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-04-12 20:58:18 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-04-19 19:47:22 +0300 |
| commit | d08184aa906508fc1f772b1d0b4f44a33c086f33 (patch) | |
| tree | 2bc41c7756b328bed35b57009b868f5070f39b02 | |
| parent | aeda5f4edbe5360f8ba62ca342bafb9687ec4f56 (diff) | |
drm/i915: Enable per-lane DP drive settings for bxt/glk
Now the bxt/glk PHY code is ready for per-lane drive settings
so enable it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240412175818.29217-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index fb84ca98bb7a..947575140059 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -334,7 +334,7 @@ static bool has_per_lane_signal_levels(struct intel_dp *intel_dp, struct drm_i915_private *i915 = dp_to_i915(intel_dp); return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy) || - DISPLAY_VER(i915) >= 11; + DISPLAY_VER(i915) >= 10 || IS_BROXTON(i915); } /* 128b/132b */ |