diff options
| author | Jacob Keller <jacob.e.keller@intel.com> | 2025-06-23 17:29:57 -0700 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2025-06-26 08:36:59 -0700 |
| commit | d261d755300eb0644873ebf41d01e1ea9f1ff8d4 (patch) | |
| tree | 0513d0dc9c51b44cd5c99cf48b462cab75d0e208 | |
| parent | 5cfb2ac2806c7a255df5184d86ffca056cd5cb5c (diff) | |
ice: clear time_sync_en field for E825-C during reprogramming
When programming the Clock Generation Unit for E285-C hardware, we need
to clear the time_sync_en bit of the DWORD 9 before we set the
frequency.
Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_tspll.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c index 08af4ced50eb..e2f07d60fcdc 100644 --- a/drivers/net/ethernet/intel/ice/ice_tspll.c +++ b/drivers/net/ethernet/intel/ice/ice_tspll.c @@ -342,6 +342,14 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, return err; } + if (dw9.time_sync_en) { + dw9.time_sync_en = 0; + + err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val); + if (err) + return err; + } + /* Set the frequency */ dw9.time_ref_freq_sel = clk_freq; @@ -353,6 +361,7 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, dw9.time_ref_en = 1; dw9.clk_eref0_en = 0; } + dw9.time_sync_en = 1; err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val); if (err) return err; |