diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2025-02-21 17:52:03 +0200 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2025-02-24 18:31:15 +0000 |
| commit | f325b0786162971390e7b31666b8f37cfc0fa708 (patch) | |
| tree | 5c36cec62bc0ccd829045da8f93ac8ad1a4d6e83 | |
| parent | f9d7bbd0503d06736407f2a2404f4677f8773bb5 (diff) | |
dt-bindings: PCI: qcom-ep: Add SAR2130P compatible
Add support for using the PCI controller in the PCIe Endpoint mode on
the SAR2130P platform.
This is needed, as it is not possible to use a compatible fallback on
any other platform since SAR2130P uses slightly different set of clocks.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-5-61a0fdfb75b4@linaro.org
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 2c1918ca30dc..ac3414203d38 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - qcom,sa8775p-pcie-ep + - qcom,sar2130p-pcie-ep - qcom,sdx55-pcie-ep - qcom,sm8450-pcie-ep - items: @@ -44,11 +45,11 @@ properties: clocks: minItems: 5 - maxItems: 8 + maxItems: 9 clock-names: minItems: 5 - maxItems: 8 + maxItems: 9 qcom,perst-regs: description: Reference to a syscon representing TCSR followed by the two @@ -137,6 +138,37 @@ allOf: compatible: contains: enum: + - qcom,sar2130p-pcie-ep + then: + properties: + clocks: + items: + - description: PCIe Auxiliary clock + - description: PCIe CFG AHB clock + - description: PCIe Master AXI clock + - description: PCIe Slave AXI clock + - description: PCIe Slave Q2A AXI clock + - description: PCIe DDRSS SF TBU clock + - description: PCIe AGGRE NOC AXI clock + - description: PCIe CFG NOC AXI clock + - description: PCIe QMIP AHB clock + clock-names: + items: + - const: aux + - const: cfg + - const: bus_master + - const: bus_slave + - const: slave_q2a + - const: ddrss_sf_tbu + - const: aggre_noc_axi + - const: cnoc_sf_axi + - const: qmip_pcie_ahb + + - if: + properties: + compatible: + contains: + enum: - qcom,sdx55-pcie-ep then: properties: |