diff options
| author | Lijo Lazar <lijo.lazar@amd.com> | 2022-01-12 19:42:56 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-09 09:40:43 -0400 |
| commit | 9b4fd27601fbe7f77e7f8a8ca226211ef748844b (patch) | |
| tree | c028e10438ae7a9e58fcd6caa05651f662e3e71d /drivers/gpu | |
| parent | f544afac3f34124088b981c63843a3cc48f4ee3e (diff) | |
drm/amdgpu: Use the correct API to read register
Use SOC15 API so that the register offset is calculated correctly.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 2676a185c232..ad3e8cefbdb2 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -1637,7 +1637,7 @@ static int gfx_v9_4_3_mqd_init(struct amdgpu_ring *ring) /* set static priority for a queue/ring */ gfx_v9_4_3_mqd_set_priority(ring, mqd); - mqd->cp_hqd_quantum = RREG32(regCP_HQD_QUANTUM); + mqd->cp_hqd_quantum = RREG32_SOC15(GC, 0, regCP_HQD_QUANTUM); /* map_queues packet doesn't need activate the queue, * so only kiq need set this field. |