diff options
| author | Fuad Tabba <tabba@google.com> | 2024-12-16 10:50:54 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2024-12-20 13:54:03 +0000 |
| commit | 1eccad35c9268f1ad4be3d72d37167a58c0ac2db (patch) | |
| tree | 1b675994e0d03c751af7f663f1b746a14d8094b9 /net/lapb/lapb_timer.c | |
| parent | 8f7df795b2da0564b22a03c4aceec90bfc5e1b1b (diff) | |
KVM: arm64: Fix the value of the CPTR_EL2 RES1 bitmask for nVHE
Since the introduction of SME, bit 12 in CPTR_EL2 (nVHE) is TSM
for trapping SME, instead of RES1, as per ARM ARM DDI 0487K.a,
section D23.2.34.
Fix the value of CPTR_NVHE_EL2_RES1 to reflect that, and adjust
the code that relies on it accordingly.
Signed-off-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20241216105057.579031-15-tabba@google.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions