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authorMatti Vaittinen <mazziesaccount@gmail.com>2025-04-07 14:36:47 +0300
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2025-04-22 19:10:03 +0100
commitfbc18f27cf214347d121ceb943b0ac07b5f07249 (patch)
tree122f9250b673febcf39e51e7197389c7c2bb72c0 /scripts/gdb/linux/utils.py
parent944de7fce763f6233a03fdc496630ae0e259015f (diff)
iio: adc: ti-adc128s052: Support ROHM BD79104
The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits. The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver. NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it. NOTE II: The BD79104 requires SPI MODE 3. NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Datasheet: https://www.ti.com/lit/ds/symlink/adc128s052.pdf # [1] Datasheet: https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79104fv-la-e.pdf # [2] Link: https://patch.msgid.link/36ffa72cbdf8dbbdf1e612040db82ebcdf73fa24.1744022065.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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