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| author | Yi Yang <yiyang13@huawei.com> | 2022-11-26 10:08:52 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-01-19 15:54:01 +0100 |
| commit | 38f28cfe9d08e3a47ef008798b275fef8118fc20 (patch) | |
| tree | 00bdd3dd8ffc98249044fa48d39b6c03404aa5ee /scripts/generate_rust_analyzer.py | |
| parent | c8f71b49ee4d28930c4a6798d1969fa91dc4ef3e (diff) | |
serial: tegra: Add missing clk_disable_unprepare() in tegra_uart_hw_init()
Add the missing clk_disable_unprepare() before return from
tegra_uart_hw_init() in the error handling path.
When request_irq() fails in tegra_uart_startup(), 'tup->uart_clk'
has been enabled, fix it by adding clk_disable_unprepare().
Fixes: cc9ca4d95846 ("serial: tegra: Only print FIFO error message when an error occurs")
Fixes: d781ec21bae6 ("serial: tegra: report clk rate errors")
Signed-off-by: Yi Yang <yiyang13@huawei.com>
Link: https://lore.kernel.org/r/20221126020852.113378-1-yiyang13@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions