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authorThéo Lebrun <theo.lebrun@bootlin.com>2024-11-06 17:03:52 +0100
committerStephen Boyd <sboyd@kernel.org>2024-11-14 14:52:26 -0800
commita370b2d22dc0a68631fadca5080cd78fa99e4284 (patch)
tree1de7c15fe016d5cfce2e8bab74469e4c8a575d76 /scripts/generate_rust_analyzer.py
parent25d904946a0baf08b16204d95dc3624096d99c38 (diff)
dt-bindings: soc: mobileye: set `#clock-cells = <1>` for all compatibles
Some compatibles expose a single clock. For those, we used to let them using `#clock-cells = <0>` (ie <&olb> reference rather than <&olb 0>). Switch away from that: enforce a cell for all compatibles. This is more straight forward, and avoids devicetree changes whenever a compatible goes from exposing a single clock to multiple ones. Also, dt-bindings get simpler. *This is an ABI break*. Change it while EyeQ5 platform support is at its infancy, without any user. More clocks might hide in each OLB as some registers are still unknown. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20241106-mbly-clk-v2-1-84cfefb3f485@bootlin.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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