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| author | Drew Fustini <dfustini@tenstorrent.com> | 2024-08-01 11:38:05 -0700 |
|---|---|---|
| committer | Drew Fustini <drew@pdp7.com> | 2024-08-08 09:19:45 -0700 |
| commit | e919fe036a97f6ed96eecf39ea61963eb2ff3442 (patch) | |
| tree | 3bfbd10ea51933b5a65be864329d3b92da7afe1b /scripts/generate_rust_analyzer.py | |
| parent | 32121e158449f0b6d6ab6b2e63b22d9d80471563 (diff) | |
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions