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authorJani Nikula <jani.nikula@intel.com>2025-01-03 15:52:39 +0200
committerJani Nikula <jani.nikula@intel.com>2025-01-07 18:44:26 +0200
commitef0a0757bbeac9aedff66464c6fba2d896cfe343 (patch)
treeebeb30433127b0e8436944c43ad63ee58b68b8fe /scripts/generate_rust_analyzer.py
parent79a6734cd56e70e22d557acbfc62ab36c835fa8f (diff)
drm/i915/dp: compute config for 128b/132b SST w/o DSC
Enable basic 128b/132b SST functionality without compression. Reuse intel_dp_mtp_tu_compute_config() to figure out the TU after we've determined we need to use an UHBR rate. It's slightly complicated as the M/N computation is done in different places in MST and SST paths, so we need to avoid trashing the values later for UHBR. If uncompressed UHBR fails, we drop to compressed non-UHBR, which is quite likely to fail as well. We still lack 128b/132b SST+DSC. We need mst_master_transcoder also for 128b/132b SST. Use cpu_transcoder directly. Enhanced framing is "don't care" for 128b/132b link. v2: mst_master_transcoder, enhanced framing (Imre) Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/084e4e05bf25a5dd396dd391014943d42b11c88d.1735912293.git.jani.nikula@intel.com
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