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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-02-12 11:00:09 +0100
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-03-06 11:54:20 +0100
commit5424793452d134ec1a173bd748c757144f25b1e2 (patch)
tree5626742895b071879af28cf56c54966ca906d590 /scripts/lib/kdoc/kdoc_output.py
parent8a7b1efb2ae89ea09c406afed19fcb8d8c1aff9d (diff)
soc: mediatek: mt8167-mmsys: Fix missing regval in all entries
The mmsys routing table for this SoC was effectively missing initialization of the val variable of struct mtk_mmsys_routes: this means that `val` was incorrectly initialized to zero, hence the registers were wrongly initialized. Add the required regval to all of the entries of the routing table for this SoC to fix display controller functionality. Fixes: 060f7875bd23 ("soc: mediatek: mmsys: Add support for MT8167 SoC") Link: https://lore.kernel.org/r/20250212100012.33001-6-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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