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| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2025-02-09 19:05:06 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-21 16:23:01 +0100 |
| commit | 624b2a23d46abc5ca5f336598dfe8c339a964aae (patch) | |
| tree | 55ad19498fd48d08e4e46871a87ea935fa7d4fc3 /scripts/lib/kdoc/kdoc_output.py | |
| parent | 399f14ff6625cbfb666c4372a469714f840f7df3 (diff) | |
arm64: dts: renesas: rzg2: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas RZ/G2 SoCs.
All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250209180616.160253-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_output.py')
0 files changed, 0 insertions, 0 deletions