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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-02-20 12:09:45 +0100 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-02-25 10:00:38 +0100 |
| commit | affbd1197886bf0e05a0a71d3fdeb0a1abd9703d (patch) | |
| tree | 287a1767d3a37c6da75ab4c73b86494f1175c779 /scripts/lib/kdoc/kdoc_output.py | |
| parent | 1afaeca17238ef6480b1a76e7fd8b3c33d406ef7 (diff) | |
arm64: dts: mediatek: mt8188: Add base display controller graph
The display related IPs in MT8188 are flexible and support being
interconnected with different instances of DDP IPs and/or with
different DDP IPs, forming a full Display Data Path that ends
with an actual display output, which is board specific.
Add a common graph in the main mt8188.dtsi devicetree, which is
shared between all of the currently supported boards.
All boards featuring any display functionality will extend this
common graph to hook the display controller of the SoC to their
specific output port(s).
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # On MT8188 Ciri (int. and ext.)
Link: https://lore.kernel.org/r/20250220110948.45596-2-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_output.py')
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