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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-02-13 12:20:08 +0100
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2025-03-06 10:53:06 +0100
commite913aec7ed80407a8068bdc0a88c426e1c9e5206 (patch)
treec12346aa66c5bc4beb3abb52d51b1a89153a9c07 /scripts/lib/kdoc/kdoc_output.py
parentdf514c118e2fccb8808598da4dd1b17509fe8780 (diff)
arm64: dts: mediatek: mt8395-nio-12l: Preconfigure DSI0 pipeline
This board can use a MIPI-DSI panel on the DSI0 connector: in preparation for adding an overlay for the Radxa Display 8HD, add a pipeline connecting VDOSYS0 components to DSI0. This pipeline remains disabled by default, as it is expected to be enabled only by a devicetree overlay that declares the actual DSI panel node, completing the graph. Link: https://lore.kernel.org/r/20250213112008.56394-4-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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