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author | Jeeja KP <jeeja.kp@intel.com> | 2015-10-07 11:31:52 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2015-10-07 15:30:15 +0100 |
commit | e4e2d2f45284f620eeb9eea25570838b2a42c968 (patch) | |
tree | ef93616e1f5221fb1941fc3858a3e951c974a131 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
parent | b5e5a4549c8b88a880fa3866fa3803ea9396ba03 (diff) |
ASoC: Intel: Skylake: Add pipe and modules handlers
SKL driver needs to instantiate pipelines and modules in the DSP.
The topology in the DSP is modelled as DAPM graph with a PGA
representing a module instance and mixer representing a pipeline
for a group of modules along with the mixer itself.
Here we start adding building block for handling these. We add
resource checks (memory/compute) for pipelines, find the modules
in a pipeline, init modules in a pipe and lastly bind/unbind
modules in a pipe These will be used by pipe event handlers in
subsequent patches
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
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