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authorJouni Högander <jouni.hogander@intel.com>2025-02-13 08:47:56 +0200
committerJouni Högander <jouni.hogander@intel.com>2025-02-13 16:41:22 +0200
commit411ad63877bbfd74d05ce79bceca75c15a400236 (patch)
treea495e3945d5e740c13c6b771e66ee8d5f535a5db /tools/perf/scripts/python/export-to-postgresql.py
parent3b5bf853e3093eec34dc080ab375c2bd0758995d (diff)
drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards
In LunarLake we have SFF_CTL register which contains SFF bit ored with respective SFF bit in PSR2_MAN_TRK_CTL register. Use this register instead of the bit in PSR2_MAN_TRK_CTL on frontbuffer tracking callbacks. This helps us avoiding taking psr mutex when performing atomic commit. We don't need to set the CFF bit as selective update configuration in PSR2_MAN_TRL_CTL is not overwritten anymore. I.e. we have valid configuration in PSR2_MAN_TRK_CTL and in plane SEL_FETCH_* registers when SFF bit gets cleared by the HW in case something triggers "frame change" event after SFF bit is cleared. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-6-jouni.hogander@intel.com
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