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authorSiddharth Vadapalli <s-vadapalli@ti.com>2025-04-22 17:30:37 +0530
committerNishanth Menon <nm@ti.com>2025-05-02 08:29:25 -0500
commit46e3d7d7048872ffb90aa25e360b975dc1c3e28b (patch)
tree9ff39ebd9d0e33ece85ea0e9db2b4f905464789c /tools/perf/scripts/python/export-to-postgresql.py
parent1159f911435b9371575d9956bb5aef579265d29a (diff)
arm64: dts: ti: k3-j7200-main: Switch to 64-bit address space for PCIe1
The PCIe0 instance of PCIe in J7200 SoC supports: 1. 128 MB address region in the 32-bit address space 2. 4 GB address region in the 64-bit address space The default configuration is that of a 128 MB address region in the 32-bit address space. While this might be sufficient for most use-cases, it is insufficient for supporting use-cases which require larger address spaces. Therefore, switch to using the 64-bit address space with a 4 GB address region. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20250422120042.3746004-3-s-vadapalli@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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