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| author | Anup Patel <apatel@ventanamicro.com> | 2025-02-17 14:26:52 +0530 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2025-02-20 15:19:26 +0100 |
| commit | 58d868b67a9ac0db477f714939f21849db5f5178 (patch) | |
| tree | c7f365e724c9904bb76cd099645d8e6b92ea1029 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | e54b1b5e89ae765e6d71d41883a8f551fde8d0ab (diff) | |
RISC-V: Select CONFIG_GENERIC_PENDING_IRQ
Enable CONFIG_GENERIC_PENDING_IRQ for RISC-V so that RISC-V interrupt chips
can support delayed interrupt mirgration in interrupt context.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250217085657.789309-7-apatel@ventanamicro.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions